diff --git a/6-consumer/lessons/1-speech-recognition/code-record/wio-terminal/smart-timer/src/mic.h b/6-consumer/lessons/1-speech-recognition/code-record/wio-terminal/smart-timer/src/mic.h
index ecdeb418..3210ee0a 100644
--- a/6-consumer/lessons/1-speech-recognition/code-record/wio-terminal/smart-timer/src/mic.h
+++ b/6-consumer/lessons/1-speech-recognition/code-record/wio-terminal/smart-timer/src/mic.h
@@ -156,7 +156,7 @@ typedef struct
         DMAC->Channel[1].CHCTRLA.bit.ENABLE = 1;
 
         // Configure Timer/Counter 5
-        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable perhipheral channel for TC5
+        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable peripheral channel for TC5
                                          GCLK_PCHCTRL_GEN_GCLK1; // Connect generic clock 0 at 48MHz
 
         TC5->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; // Set TC5 to Match Frequency (MFRQ) mode
diff --git a/6-consumer/lessons/1-speech-recognition/code-speech-to-text/wio-terminal/smart-timer/src/mic.h b/6-consumer/lessons/1-speech-recognition/code-speech-to-text/wio-terminal/smart-timer/src/mic.h
index 5f0815de..655ff381 100644
--- a/6-consumer/lessons/1-speech-recognition/code-speech-to-text/wio-terminal/smart-timer/src/mic.h
+++ b/6-consumer/lessons/1-speech-recognition/code-speech-to-text/wio-terminal/smart-timer/src/mic.h
@@ -150,7 +150,7 @@ typedef struct
         DMAC->Channel[1].CHCTRLA.bit.ENABLE = 1;
 
         // Configure Timer/Counter 5
-        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable perhipheral channel for TC5
+        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable peripheral channel for TC5
                                          GCLK_PCHCTRL_GEN_GCLK1; // Connect generic clock 0 at 48MHz
 
         TC5->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; // Set TC5 to Match Frequency (MFRQ) mode
diff --git a/6-consumer/lessons/1-speech-recognition/wio-terminal-audio.md b/6-consumer/lessons/1-speech-recognition/wio-terminal-audio.md
index 8b3a45bb..78b029f0 100644
--- a/6-consumer/lessons/1-speech-recognition/wio-terminal-audio.md
+++ b/6-consumer/lessons/1-speech-recognition/wio-terminal-audio.md
@@ -297,7 +297,7 @@ Once each buffer has been captured, it can be written to the flash memory. Flash
         DMAC->Channel[1].CHCTRLA.bit.ENABLE = 1;
 
         // Configure Timer/Counter 5
-        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable perhipheral channel for TC5
+        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable peripheral channel for TC5
                                             GCLK_PCHCTRL_GEN_GCLK1; // Connect generic clock 0 at 48MHz
 
         TC5->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; // Set TC5 to Match Frequency (MFRQ) mode
diff --git a/6-consumer/lessons/3-spoken-feedback/code-spoken-response/wio-terminal/smart-timer/src/mic.h b/6-consumer/lessons/3-spoken-feedback/code-spoken-response/wio-terminal/smart-timer/src/mic.h
index 5f0815de..655ff381 100644
--- a/6-consumer/lessons/3-spoken-feedback/code-spoken-response/wio-terminal/smart-timer/src/mic.h
+++ b/6-consumer/lessons/3-spoken-feedback/code-spoken-response/wio-terminal/smart-timer/src/mic.h
@@ -150,7 +150,7 @@ typedef struct
         DMAC->Channel[1].CHCTRLA.bit.ENABLE = 1;
 
         // Configure Timer/Counter 5
-        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable perhipheral channel for TC5
+        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable peripheral channel for TC5
                                          GCLK_PCHCTRL_GEN_GCLK1; // Connect generic clock 0 at 48MHz
 
         TC5->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; // Set TC5 to Match Frequency (MFRQ) mode
diff --git a/6-consumer/lessons/3-spoken-feedback/code-timer/wio-terminal/smart-timer/src/mic.h b/6-consumer/lessons/3-spoken-feedback/code-timer/wio-terminal/smart-timer/src/mic.h
index 5f0815de..655ff381 100644
--- a/6-consumer/lessons/3-spoken-feedback/code-timer/wio-terminal/smart-timer/src/mic.h
+++ b/6-consumer/lessons/3-spoken-feedback/code-timer/wio-terminal/smart-timer/src/mic.h
@@ -150,7 +150,7 @@ typedef struct
         DMAC->Channel[1].CHCTRLA.bit.ENABLE = 1;
 
         // Configure Timer/Counter 5
-        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable perhipheral channel for TC5
+        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable peripheral channel for TC5
                                          GCLK_PCHCTRL_GEN_GCLK1; // Connect generic clock 0 at 48MHz
 
         TC5->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; // Set TC5 to Match Frequency (MFRQ) mode
diff --git a/6-consumer/lessons/4-multiple-language-support/code/wio-terminal/smart-timer/src/mic.h b/6-consumer/lessons/4-multiple-language-support/code/wio-terminal/smart-timer/src/mic.h
index 5f0815de..655ff381 100644
--- a/6-consumer/lessons/4-multiple-language-support/code/wio-terminal/smart-timer/src/mic.h
+++ b/6-consumer/lessons/4-multiple-language-support/code/wio-terminal/smart-timer/src/mic.h
@@ -150,7 +150,7 @@ typedef struct
         DMAC->Channel[1].CHCTRLA.bit.ENABLE = 1;
 
         // Configure Timer/Counter 5
-        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable perhipheral channel for TC5
+        GCLK->PCHCTRL[TC5_GCLK_ID].reg = GCLK_PCHCTRL_CHEN |     // Enable peripheral channel for TC5
                                          GCLK_PCHCTRL_GEN_GCLK1; // Connect generic clock 0 at 48MHz
 
         TC5->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; // Set TC5 to Match Frequency (MFRQ) mode